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[VHDL-FPGA-Verilog] verilog100

Description: 有很多例子及测试代码，对初学者很有帮助，很容易上手-a lot of examples and test code, useful for beginners, it is easy to get started
Platform: | Size: 175104 | Author: bobodu | Hits:

[assembly language] byte_crc

Description: 字节型CRC校验 采用verilog语言设计-Byte CRC checksum type design using Verilog language
Platform: | Size: 403456 | Author: 郭超勇 | Hits:

[VHDL-FPGA-Verilog] CRC32

Description: VHDL CRC32 VHDL CRC32
Platform: | Size: 1714176 | Author: easyboy | Hits:

[VHDL-FPGA-Verilog] PCK_CRC16_D8

Description: VERILOG的CRC代码,节约资源,高效.欢迎提意见-good verilog for crc,is good for fpga.welcome to down
Platform: | Size: 1024 | Author: sxh | Hits:

[Other] CRC16_D8_m

Description: 用verilog实现的crc校验，符合标准-Crc check with verilog implementation, the standard
Platform: | Size: 1024 | Author: 张华 | Hits:

[VHDL-FPGA-Verilog] crc_verilog_xilinx

Description: verilog 代码的循环冗余校验crc实现的源程序，请大家指教-verilog crc
Platform: | Size: 10240 | Author: 梁俊锋 | Hits:

[VHDL-FPGA-Verilog] jjm

Description: 用Verilog实现的crc16编码器，可以实现任意长度帧的发送信息的crc无失真编码-Implemented with Verilog crc16 encoder can send frames of any length lossless coding of information crc
Platform: | Size: 199680 | Author: 陆翔 | Hits:

[VHDL-FPGA-Verilog] cookbook

Description: 用于verilog入门的小程序，包括各种crc,compare等常用硬件电路的描述-verilog cookbook，including several verilog code of crc，compare circuit etc.
Platform: | Size: 3442688 | Author: alice | Hits:

[VHDL-FPGA-Verilog] crc7_4

Description: 使用Verilog HDL语言按标准编写的CRC（7,4）循环码，对学习编码有很好的指导作用！-Verilog HDL CRC(7,4) coding
Platform: | Size: 193536 | Author: caizhixiang | Hits:

[VHDL-FPGA-Verilog] my

Description: 64位数据的CRC-32校验的，Verilog实现，算法并行优化-64-bit data CRC-32 checksum, Verilog implementation of a parallel optimization algorithm
Platform: | Size: 133120 | Author: dowson | Hits:

[VHDL-FPGA-Verilog] crc_tool

Description: 用c编写的自动生成并行crc处理的verilog代码的工具-Automatically generate the verilog code to parallel crc processing tools written with c
Platform: | Size: 56320 | Author: wangxin | Hits:

[VHDL-FPGA-Verilog] crc16-

Description: 本文档描述了一种CRC校验的方法，开发语言为verilog。程序自己写的，包括测试代码。欢迎参考-This document describes a CRC checksum method development language verilog. Write their own procedures, including test code. Welcome reference
Platform: | Size: 1024 | Author: 秦艳召 | Hits:

[Other] CRC3

Description: CRC3算法 verilog 实现,循环校验，在传输数据时通过crc算法，验证数据是否传输正确-CRC3 algorithm verilog achieve, cyclic check whether the transmission data by the the crc algorithm, validation data transferred correctly
Platform: | Size: 1024 | Author: 周勇勃 | Hits:

[Other] CRC16_8

Description: 利用ISE软件采用Verilog HDL语言编写CRC码，每时钟处理8bit数据，在输入序列后最终加上16位校验码。-Using Verilog HDL language CRC code, 8bit data processing per clock, after the final of the input sequence plus 16 checksum.
Platform: | Size: 3329024 | Author: 刘璐 | Hits:

[VHDL-FPGA-Verilog] CRC_Tst

Description: 关于CRC的发射，以及接受的验证，用Verilog实现，包含testbench验证-About CRC launch, as well as acceptable verification, using Verilog implementation, including verification testbench
Platform: | Size: 4506624 | Author: 尹腾飞 | Hits:

[Software Engineering] crc32

Description: crc-32 主要用于网络传输中的 检测，防止错误数据传输-verilog hdl
Platform: | Size: 3072 | Author: fengsen | Hits:

[Other] verilog_crc

Description: verilog硬件描述语言进行数据传输过程中的CRC校正。-verilog hardware description language for data transmission during CRC correction.
Platform: | Size: 449536 | Author: zhao junlong | Hits:

[MPI] CRC32_II

Description: 基于第二类LFSR串行CRC生成器的32位并行实现结构。用于SATA 3。 verilog语言。-32bit parrallel CRC module as specified in SATA 3. The module is realized with verilog.
Platform: | Size: 1024 | Author: 邢博 | Hits:

[VHDL-FPGA-Verilog] CRC32_D8

Description: 循环冗余校验编码，CRC32，verilog实现，xilinx平台上验证，结果可用。-CRC coding, CRC32, verilog implementation, verification on xilinx platform, the results are available.
Platform: | Size: 2528256 | Author: 王坤 | Hits:

[Other] CRC_5_8

Description: 本程序使用Verilog语言来编写，实现基于CCITT-16算法的CRC检验码产生电路。-This program uses Verilog language to write, implement generating circuit based on CCITT-16 algorithm CRC check code.
Platform: | Size: 4096 | Author: 李世平 | Hits:
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